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ホーム  > 教員情報  > 情報工学科  > 小林 学 教授

小林 学 教授

[研究テーマ]
効率的で正確・安全な情報通信に関する研究

[取得学位]
博士(工学)早稲田大学


効率的で正確・安全な情報通信に関する研究

携帯電話やインターネットの情報通信に必要な、動画・音声・テキストなどのデータ圧縮技術、通信時に発生する雑音の影響を除去する誤り訂正符号化技術について研究しています。さらに本研究室では、安全な通信のための情報セキュリティ技術についても研究を行っています。

主な研究業績

<著書>
  1. 後藤正幸,小林 学,パターン認識と機械学習入門,コロナ社,2014年4月.
  2. 須子 統太,鈴木 誠,浮田 善文,小林 学,後藤 正幸,IT Text 確率統計学,オーム社,2010.
  3. 坂田四郎,甲藤二郎,佐藤文明,小林 学,塩田茂男,IT Textインターネットプロトコル,オーム社,2005.

<発表論文(査読有)>
  1. K.Umezawa, T.Ishida, M.Aramoto, M.Kobayashi, M.Nakazawa, S.Hirasawa, "A Method based on Self-study Log Information for Improving Effectiveness of Classroom Component in Flipped Classroom Approach," International Journal of Software Innovation (IJSI), Vol.4, Issue 2, pp.125-128, March 2016.
  2. 三川健太,小林 学,後藤正幸,"教師あり学習に基づくL1正則化を用いた軽量行列の学習法に関する一考察", 日本経営工学会論文誌,Vol.66, No.3, pp.230-239, 2015.
  3. M. Goto, K. Mikawa, S. Hirasawa, M. Kobayashi and S. Horii, "A New Latent Class Model for Analysis of Purchasing and Browsing Histories on an EC Site," Journal of Industrial Engineering & Management Systems, Vol.14, No.4, pp.1-12, Dec. 2015.
  4. M. Kobayashi, H.Ninomiya, Y.Miura and S. Watanabe, "Reconfigurable Dynamic Logic Circuit Generating t Term Boolean Functions Based on Double-Gate CNTFETs", IEICE Trans. on Fundamentals, Vol. E97-A, No.5, May, 2014.
  5. H. Ninomiya, M. Kobayashi, Y. Miura and S. Watanabe, "Reconfigurable Circuit Design based Arithmetic Logic Unit using Double Gate CNTFETs", IEICE Trans. on Fundamentals., Vol.E97-A,No.2,Feb. 2014.
  6. J. Kato, S. Watanabe, H. Ninomiya, M. Kobayashi and Y. Miura, "Circuit Design of 2-Input Reconfigurable Dynamic Logic Based on Double Gate MOSFETs with Whole Set of 16 Functions", Contemporary Engineering Sciences, Vol. 7, no. 2, 87 - 102, Feb. 2014.
  7. J. Kato, S. Watanabe, H. Ninomiya, M. Kobayashi and Y. Miura, "Circuit Design of Reconfigurable Dynamic Logic Based on Double Gate CNTFETs Focusing on Number of States of Back Gate Voltages", Contemporary Engineering Sciences, Vol. 7, no. 1, 39 - 52, Jan. 2014.
  8. M. Kobayashi, H. Ninomiya and S. Watanabe, "Circuit Design of Reconfigurable Logic Based on Double-Gate CNTFETs", IEICE Trans. on Fundamentals., vol. E96-A, no.7, pp.1642-1644, Jul., 2013.
  9. 石田崇,小林 学,"大学における情報数理系科目のインタラクティブ教材の試作とその評価",CIEC コンピュータ&エデュケーション,vol. 35, pp.75-80, 2013.
  10. H. Ninomiya, M. Kobayashi and S. Watanabe, "2. Reduced Reconfigurable Logic Circuit Design based on Double Gate CNTFETs using Ambipolar Binary Decision Diagram", IEICE Trans. on Fundamentals., vol. E96-A, no.1, pp. 356-359, Jan. 2013.
  11. 小畑 智広,池上 裕之,小林 学,坂下 善彦,"3. 文脈木重み付け法による確率モデルを限定した文書分類",電子情報通信学会論文誌(D),Vol.J95- D,No.10,pp. 1873-1876, Oct. 2012.
  12. 池上裕之,小畑智広,小林 学,坂下善彦,"4. 雑音の分散を考慮した確率分類ベクターマシンによるテキストの自動分類",電子情報通信学会論文誌(D),Vol.J95-D,No.11,pp. 1985-1988,Nov. 2012.
  13. 小林 学,堀井 俊佑,高畠 俊徳,平澤 茂一,"マルチコンピュータシステムにおける線形計画法に基づく故障診断",電子情報通信学会論文誌(A),Vol.J95-A, No.4, pp. 375-378,April 2012.
  14. G. Hosoya, H. Yagi, M. Kobayashi, and S. Hirasawa, "On the capacity of fingerprinting codes against AND, averaging, and related attacks", Journal of Information Assurance and Security, vol.7, no.1, pp.41-51, Jan. 2012.
  15. 小林 学,高畠 俊徳,平澤 茂一,"マルチコンピュータシステムにおける事後確率故障診断のための検査グラフ構成法とその解析",電子情報通信学会論文誌(D), Vol.J94-D, No.4, April 2011.
  16. 小林 学,高畠 俊徳,天野 真家,平澤 茂一,”マルチプロセッサシステムにおける確率的故障診断とその解析,“ 電子情報通信学会論文誌(D) , 査読有,Vol.J93-D, No.8, pp.1602 -1613, 2010.
  17. G. Hosoya, H. Yagi, M. Kobayashi, and S. Hirasawa, "Adapative decoding algorithms for low-density parity-check codes over the binary erasure channel," IEICE Trans. Fundamentals, 査読有, vol.E-92, no.10, pp.2418--2430, Oct. 2009.
  18. M.Kobayashi, H.Yagi, T.Matsushima and S.Hirasawa,”Density Evolution Analysis of Robustness for LDPC Codes over the Gilbert-Elliott Channel,”IEICE Trans. on Fundamentals, 査読有,Vol.E91-A, No. 10, pp. 2754 - 2764, 2008.
  19. 小林 学,松嶋 敏泰,平澤 茂一,”ブロックターボ符号のインタリーバ構成法と最小距離,” 電子情報通信学会論文誌(A), 査読有, Vol.J89-A, No. 2, pp.129  143, 2006.
  20. 小笠原 小林 学,平澤 茂一,” 2 元線形ブロック符号を用いた周期的時変畳込み符号の構成法,” 電子情報通信学会論文誌(A), 査読有, Vol.J89-A, No. 2, pp. 144 - 153, 2006.
  21. H.Yagi, M.Kobayashi and S.Hirasawa,”Complexity Reduction of the Gazelle and Snyders Decoding Algorithm for Maximum Likelihood Decoding,”IEICE Trans. on Fundamentals, 査読有, Vol. E86-A, No. 10, pp. 2461 - 2472, 2003.
  22. H.Yagi, M.Kobayashi, T.Matsushima and S.Hirasawa,”An Improved Method of Reliability - based Maximum Likelihood Decoding Algorithms using an Order Relation among Binary Vectors,”IEICE Trans. on Fundamentals, 査読有, Vol. E87-A, No. 10, pp. 2493 - 2503, 2004.
  23. T.Okada, M.Kobayashi and S.Hirasawa,”An Efficient Heuristic Search Method for Maximum Likelihood Decoding of Linear Block Codes Using Dual Codes,”IEICE Trans. on Fundamentals, 査読有, Vol. E85-A, No. 2, pp. 485 - 489, 2002.
  24. 小林 学,松嶋敏泰,平澤茂一,"BCH 限界を超える復号アルゴリズムを用いた 2元 BCH 符号の軟判定復号法",電子情報通信学会論文誌(A) , 査読有, J82-A, No.4, pp.539-549, 1999.
  25. 小林 学,松嶋敏泰,平澤茂一,"BCH 限界を超える復号法とその軟判定復号法への応用",電子情報通信学会論文誌(A) , 査読有, J81-A, No.4, pp.751-762, 1998.
  26. 小林 学,松嶋敏泰,平澤茂一,"Berlekamp-Masseyアルゴリズムを用いたBCH限界を超える復号法の計算量について",電子情報通信学会論文誌(A) , 査読有, J80-A, No.9, pp.1554-1558, 1997.
<国際会議(査読有)>
  1. M. Kobayashi, M. Goto, T. Matsushima and S. Hirasawa, "Latent Class Model Analysis Based on the Variational Bayes", Proc. of 2016 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, Honolulu, Hawaii, USA, March 2016.
  2. K.Mikawa, M.Kobayashi, M.Goto, S.Hirasawa, "A Study of Distance Metric Learning by Considering the Distances between Category Centroids", Proc. of 2014 IEEE International Conference on Systems, Man, and
    Cybernetics, pp. 1645 - 1650, Hong Kong, Oct.2015.
  3. K.Umezawa, M.Aramoto, M.Kobayashi, T.Ishida, M.Nakazawa, S.Hirasawa, "An Effective Flipped Classroom based on the Log Information of the Self-study", Proc. of the 3rd International Conference on Applied Computing & Information Technology (ACIT 2015), pp.263-268, Sep.2015.
  4. M. Kobayashi, H. Ninomiya, Y. Miura and S. Watanabe, "DRDLC Generating t-Term Boolean Functions Based on DG-CNTFETs", Proc. of 2014 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, Honolulu, Hawaii, USA, March 2014.
  5. Y, Miura, H. Ninomiya, M. Kobayashi and S. Watanabe, "An Universal Logic-Circuit with Flip Flop Circuit Based on DG-CNTFET", Proc.of 2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, pp.148-152, August 2013.
  6. M. Kobayashi, H. Ninomiya, T. Matsushima and S. Hirasawa, "Linear Time ADMM Decoding for LDPC Codes over MIMO Channels", Proc. of 2013 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp.185-188, The Island of Hawaii, USA, March 2013.
  7. M. Kobayashi, H. Ninomiya, T. Matsushima and S. Hirasawa, "An Error Probability Estimation of the Document Classification Using Markov Model", Proc. 2012 International Symposium on Information Theory and its Applications, CD-ROM, pp.712-716, Honolulu, USA, Oct. 2012.
  8. S. Horii, M. Kobayashi, T. Matsushima and S. Hirasawa, "Fault Diagnosis Algorithm in Multi-Computer Systems based on Lagrangian Relaxation Method", Proc. 2012 International Symposium on Information Theory and its Applications, CD-ROM, pp.717-721, Honolulu, USA, Oct. 2012.
  9. M.Kobayashi, T.Takabatake, T.Matsushima and S.Hirasawa, "4. Probabilistic Fault Diagnosis and its Analysis in Multicomputer Systems", Proc. 2011 IEEE International Conference on Systems, Man, and Cybernetics, CD-ROM, pp.1205-1211, Anchorage, Alaska, Oct. 2011.
  10. G.Hosoya, ,H.Yagi, M.Kobayashi and S.Hirasawa, "5. On the Capacity of Fingerprinting Codes against Unknown Size of Colluders", Proc. 7th International Conference on Information Assurance and Security, pp.234-239, Malacca, Malaysia, Dec. 2011.
  11. M.Kobayashi, H.Yagi, T.Matsushima and S.Hirasawa, "An Efficient Design of Irregular LDPC Codes using Beta Approximation for the Gilbert-Elliott Channel," Proc. of International Symposium on Information Theory and its Applications, 査読有, CD-ROM, 2008.
  12. M.Kobayashi, T.Matsushima and S.Hirasawa,"Calculation Method of Low Weight Distribution for Parallel Concatenated Block Codes," Proc. International Symposium on Information Theory and its Applications, 査読有, CD-ROM,pp. 829 – 834, 2004.
  13. H.Yagi, M.Kobayashi and S.Hirasawa, "Random Coding Bounds for Correlated Parallel Channels with Unidirectionally Cooperating Decoders," Proc. of International Symposium on Information Theory and its Applications, 査読有, CD-ROM, 2008.
  14. M. Kobayashi, T. Matsushima and S. Hirasawa, "Iterative Soft-Decision Decoding using an Update Algorithm of Error-Locator Polynomial for Binary BCH Codes", Proc. of International Symposium on Information Theory and its Applications, 査読有, pp. 90-93, 1998.

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